ENGINEERING & TECHNOLOGY IN INDIA

Strength for Today and Bright Hope for Tomorrow

ISSN 2472-8640

Volume 1:3 April 2016

Chief Editor
Dr. D. Nagarathinam, M.E., Ph.D.

Editors
         Dr. P. N. Rajnarayanan, M.E., Ph.D.
         Dr. K. Sudalaimani, M.E., Ph.D.
         Dr. S. Ramanathan, Ph.D. (Chemistry)
         David Bunce, M.S. (RIT, USA)

Language and Style Advisors
         G. Baskaran, Ph.D.
         Sam Mohanlal, Ph.D.

Executive Editor
         M. S. Thirumalai, Ph.D.

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Multiple Error Detection and Correction of Parallel Fir Filter
Based on Reduced Precision Logic

Jeswin Baby.T., M.E.
Chitra.E.N., M.E. Student


Abstract

In this paper, we propose efficient methods for error correction which provides better performance for parallel finite impulse response filters. Reduced-precision redundancy (RPR) has been shown to be a viable alternative to triple modular redundancy (TMR) for digital circuits. This paper builds on previous research by offering a detailed analysis of the implementation of RPR on FPGAs to improve reliability in soft error environments. Example implementations and fault injection experiments demonstrate the cost and benefits of RPR, showing how RPR can be used to improve the failure rate by up to 200 times over an unmitigated system at costs less than half that of TMR. A novel method is also presented for improving the error-masking ability of RPR by up to 5 times at no additional hardware cost under certain conditions. This research shows RPR to be a very flexible soft error mitigation technique and offers insight into its application on FPGAs.

Keywords: Reduced Precision redundancy, Triple Modular redundant, FPGA (Field Programmable Gate Array)

I. INTRODUCTION

A number of techniques can be used to protect a circuit from errors. Those range from modifications in the manufacturing process of the circuits to reduce the number of errors to adding redundancy at the logic or system level to ensure that errors do not affect the system functionality. To add redundancy, a general technique known as triple modular redundancy (TMR) can be used. The TMR, which triplicates the design and adds voting logic to correct errors, is commonly used. However, it more than triples the area and power of the circuit, something that may not be acceptable in some applications. When the circuit to be protected has algorithmic or structural properties, a better option can be to exploit those properties to implement fault tolerance.


This is only the beginning part of the article. PLEASE CLICK HERE TO READ THE ENTIRE ARTICLE IN PRINTER-FRIENDLY VERSION.


Jeswin Baby. T., M.E.
jeswinbaby@gmail.com

Chitra. E.N., M.E. Student
Kukku.en@gmail.com

Department of Electronics & Communication Engineering
Sri Subramanya College of Engineering & Technology
NH - 209, Sukkamanaickenpatti
Palani 624615
Tamil Nadu
India



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